GLOSSARY of Printed Circuit Design and Manufacturing
This glossary has key terminology in use in PCB design and manufacturing, with a smattering of electronics. The definitions were chosen so that their context would likely apply to reading material encountered by a PCB designer. Therefore, many of these terms will have other meanings not given here. It is recommended by scholars that you also clear up the non-technical definitions in regular dictionaries. There are such dictionaries recommended below.
This collection of terms came about as I, a PCB designer, ran across words and acronyms in my field for which meanings were hard to find. As I tracked them down, I made them part of this glossary. If you are a PCB designer, then this glossary could be a good place to start when you find a need to look up the meanings of words related to printed circuits or electronics.
Alphabetizing
Method
Terms that begin with a symbol or a digit are placed in the SYMBOLS page. Terms that contain digits within them are alphabetized as if the numeric
characters were spelled in English.
Terms with two or more words are alphabetized "dictionary style." They are alphabetized as though the spaces between the terms have been removed. If there are other characters in the term, such as a slash (/), dash (-) or plus sign (+), these are treated the same as spaces and ignored for the purpose of alphabetizing.
Modern Dictionary of Electronics
by Rudolf F. Graf
This is the best, most usable dictionary for electronics, because its
definitions help you grasp the terms and therefore the subject. Lesser
dictionaries define electronics terms with even more difficult technical
jargon, leading one into endless"word chains." Not this one.
You can
buy the Modern Dictionary of Electronics new or used
via the Internet.
Citation:
Graf, Rudolf F. Modern Dictionary of Electronics. Newnes, 1999.
The Random House Dictionary of the English Language, Unabridged, 2nd Edition
You need a big, comprehensive dictionary. Get this one. Despite being a big
dictionary,
The Random House
has great definitions, quick to grasp.
Although out of print, as of 2022 you could still buy a great used copy online for $40 including shipping or possibly for much less. Two versions are available of the 2nd Edition, Unabridged:
I have no idea what the difference is for the deluxe edition, but there seem to be fewer copies of it available in 2020 than the regular edition. I'm sure they both have the same set of definitions. My copy has both ISBNs listed in the front matter, and it is the regular edition.
Citation:
Flexner, Stuart Berg, and Leonore Crary Hauck, editors. The Random House Dictionary of the English Language. Unabridged, 2nd Edition, Random House, 1987.
A type of PCB component which contains a chip and acts to make a convenient mechanism for protecting the chip while on the shelf and after attachment to a PCB. With its leads soldered to a printed circuit board, a package serves as the electrical conduction interface between the chip and the board. An example is a DIP.
padstack — (PAD-stak)
Pronunciation Key noun [PCB Manufacturing] The size and vertical sequence of pads together with the finished hole size for any one type of pin or via.
PAL — Programmable Array Logic (PAL) is a family of programmable logic device semiconductors used to implement logic functions in digital circuits introduced by Monolithic Memories, Inc. (MMI) in March 1978.[1] MMI obtained a registered trademark on the term PAL for use in "Programmable Semiconductor Logic Circuits". The trademark is currently held by Lattice Semiconductor.[2]
PAL devices consisted of a small PROM (programmable read-only memory) core and additional output logic used to implement particular desired logic functions with few components.
Using specialized machines, PAL devices were "field-programmable". Each PAL device was "one-time programmable" (OTP), meaning that it could not be updated and reused after its initial programming. (MMI also offered a similar family called HAL, or "hard array logic", which were like PAL devices except that they were mask-programmed at the factory.)
In most applications, electrically-erasable GALs are now deployed as pin-compatible direct replacements for one-time programmable PALs.
Wikipedia Programmable Array Logic
panel — material (most commonly an glass/epoxy-copper laminate known as core) sized for fabrication of printed circuit boards. Panels come in many, many sizes, the most common being 12" by 18" and 18" by 24". Subtract 1/2" to 1" margins (check with your board house) from the panel size to arrive at the space available for printed circuitry.
To lay up more than one (usually identical)printed circuits on a pans. Individual printed circuits on a panel need a margin between them of 0.3.". Some board houses permit less separation.
Lay up multiple printed circuits (called modules) into a sub-panel so that the sub-panel can be assembled as a unit. The modules can then be separated after assembly into discrete printed circuits.
parametric equation — any of a set of equations that express the coordinates of the points of a curve as functions of one parameter or that express the coordinates of the points of a surface as functions of two parameters. [Merriam-Webster's online dictionary]
Parasitic capacitance — (PAIR-ə-sih-tik kuh-PASS-ih-təns)
Pronunciation Keynoun [Printed Circuits]
Parasitic capacitance refers to an unwanted electrical capacitance that occurs between different parts of an electronic circuit. It is not intentionally added but is inherent in the physical structure of the circuit.
This capacitance occurs due to the proximity of conductive elements (such as traces or components) within a circuit that are separated by an insulating material. These elements act like a capacitor, storing and transferring electrical charge unintentionally. This effect is more pronounced in high frequency circuits.
Parasitic capacitance can interfere with the normal operation of a circuit, causing signal distortion, slower response times, or power loss, especially in high-speed or high-frequency circuits.
Parasitic capacitance can be minimized by careful circuit design, such as increasing the spacing between conductive elements, using ground planes, or selecting materials with lower dielectric constants. Shielding and proper layout techniques can also help reduce its impact.
Source — The term "parasitic" comes from the Greek word "parasitos," meaning "one who eats at another's table," reflecting how this capacitance is an unwanted, unintentional effect that "feeds off" the intended design. "Capacitance" derives from the Latin "capacitas," meaning the ability to hold, in this case referring to the capacity to store an electric charge.
Additional Information — Although parasitic capacitance is generally considered an unwanted effect, Lee Ritchey points out in his book Right The First Time - A Practical Handbook On High Speed PCB And System Design that in high-speed logic circuits, parasitic capacitance plays a necessary role. In these circuits, the signal lines or transmission lines must charge and discharge their parasitic capacitance in order to transition between logic states. This capacitance, often referred to as load capacitance in this context, is crucial for changing the state of the signal from a logical zero to a one, and thus enables the basic operation of digital logic.
[Altium Designer]A gate. In Altium Designer, the various gates grouped to form a library component are called "parts." To add an additional gate when designing the library component, one uses the Altium menu command Tools > New Part.
parts of speech — The set of eight parts of speech used for this glossary are noun, pronoun, verb, modifier (a group comprised of adverbs and adjectives), preposition, conjunction, interjection and articles (the, a and an).
passive component — A device which does not add energy to the signal it passes. Examples: resistor, capacitor, inductor. (Contrast with
active component.
A computer file (for example, an Altium Designer file with the extension .PcbDoc) from which artwork can be generated as data files ( CAM files ). Also called PCB layout.
PCB design service bureau — (A business engaged in) PCB design as a service for others, especially electrical engineers. The word bureau is French for desk, or office, and this service is indeed performed from an office while sitting at a desk. Also called PCB design shop.
NAICS code 541430
PCB design done as a service is a type of "Graphic Design Service." Specifically, in the decades following the hand-tape-up era, it is Computer-aided design drafting (CADD) service." North American Industry Classification System (NAICS) code for all categories of Graphic Design Services is 541430.
PCB fabrication panel — The PCB panel (q.v.) that a bare board manufacturer uses to fabricate your boards and assembly palettes (q.v.). It may contain several assembly palettes or just single PCBs. The most common size is 18 × 24 in.
PCB panel — A flat, rectangular piece of epoxy/glass laminated between layers of copper. (These are not the only materials used but are the most common.) There can be many copper layers or only one or two. The lamination is done in heated presses after the PCB artwork has been etched onto the copper. The creation of a panel is done by a lengthy series of processes.
PCB Fabrication Process Tour by Saturn Electronics Corporation is a good introduction to these processes. See also PCB fabrication panel and assembly palette, which are both types of PCB panels used in PCB manufacturing.
PCI — Peripheral Component Interconnect." PCI is a hardware bus used for adding internal components to a desktop computer. ... The PCI architecture, also known as "conventional PCI," was designed by Intel and introduced in 1992. Compare with "CompactPCI".
https://techterms.com/definition/pci
PCI mezzanine card — [PCB Form Factor] Abbreviation: PMC. A family of low profile printed circuit board assemblies manufactured to the IEEE P1386.1 standard, "Draft Standard for Physical and Environmental Layers for PCI." This standard combines the electrical characteristics of the PCI bus with the mechanical dimensions of the Common Mezzanine Card or CMC format (IEEE 1386 standard). These mezzanine cards have logical and electrical layers based on the Peripheral Component Interconnect (PCI) specification. PMC follows the
Common Mezzanine Card (CMC) mechanical specification (a downloadable PDF file by IEEE Computer Society P1386/Draft 2.4a and made available by nanopdf.com).
PDF — Portable Document Format. Adobe® Acrobat® format. In ordinary text (i.e., in uses other than filename extensions or directory names), the acronym is almost universally capitalized.
Stammtisch Beau Fleuve Acronyms PDF
PDM — Product data management (PDM) is the business function often within product lifecycle management(PLM) that is responsible for the management and publication of product data.[1][2] In software engineering, this is known as version control. The management of version control is the only way to ensure that everyone is on the same page and that there is no confusion during the execution of the processes and that the highest standards of quality controls are maintained
PEM — 1. A self-clinching threaded fastener for insertion into a PCB, made by PEM.
2. Penn Engineering And Manufacturing, now known as PennEngineering
, a manufacturer of nuts, studs, standoffs, self-clinching fasteners and related machinery including the brands
PER — (PCI Express)a pin name prefix that signifies RX destination signals with respect to the baseboard device. A "p" or "n" is also appended to the pin name to represent the D+ or D- signals, respectively (example PER2p).
PET — (PCI Express)a pin name prefix that signifies TX originating signals with respect to the baseboard device. A "p" or "n" is also appended to the pin name to represent the D+ or D- signals, respectively (example PET2p).
pF —
(PUF) Pronunciation Key picofarad, or "micro-micro-farad." The pico prefix means 10^(-12), or one millionth of a millionth. One million pF = 1 uF.
PFDM — Parasitic Factors Derating Method, a section in Xilinx's Virtex-4 User Guide which "describes a method to evaluate whether a design is within the SSO limits when taking into account the specific electrical characteristics of the user's unique system."
photoplotter — Device used to generate artwork photographically by plotting objects (as opposed to copying an entire image at once as with a camera) onto film for use in manufacturing printed wiring.
PHY — is an abbreviation for the physical layer of the OSI model (Open Systems Interconnection model ). The physical layer defines the means of transmitting raw bits[4] rather than logical data packets over a physical data link connecting network nodes. Within the semantics of the OSI model, the physical layer translates logical communications requests from the data link layer into hardware-specific operations to cause transmission or reception of electronic signals.
PHY is layer 1, the lowest layer in the 7-layer OSI model. It is the lowest of 3 "media layers." The other 4 layers are "Host Layers." Its data unit is the bit. Its function is media, signal and binary transmission.
In the seven-layer OSI model of computer networking, the physical layer or layer 1 is the first and lowest layer.[1] This layer may be implemented by a PHY chip.
The physical layer consists of the electronic circuit transmission technologies of a network.[2] It is a fundamental layer underlying the higher level functions in a network. Due to the plethora of available hardware technologies with widely varying characteristics, this is perhaps the most complex layer in the OSI architecture.[3][not in citation given]
The physical layer defines the means of transmitting raw bits[4] rather than logical data packets over a physical data link connecting network nodes. The bitstream may be grouped into code words or symbols and converted to a physical signal that is transmitted over a transmission medium. The physical layer provides an electrical, mechanical, and procedural interface to the transmission medium. The shapes and properties of the electrical connectors, the frequencies to broadcast on, the line code to use and similar low-level parameters, are specified here.
Within the semantics of the OSI model, the physical layer translates logical communications requests from the data link layer into hardware-specific operations to cause transmission or reception of electronic signals.
Wikipedia PHY - Physical layer
physical component — [Altium Designer] See
logical component for explanations and actions you can take to fully understand these concepts of Altium's use of logical vs physical components.
An artwork layer (Gerber file) that is used in the manufacture of a
naked
(not populated with components) PCB ("bare board") and represents one of its layers. Examples are trace layers, power planes, solder masks and silkscreens. Examples of other Gerber or CAM ouput which are not physical layers are fabrication, assembly drawing, solder paste and NC Drill files. NC Drill files ARE used in the manufacture of a bare PCB, but not as one of its layers. Solder paste artwork is used to make a stencil for applying solder paste AFTER the PCB is manufactured (in preparation for assembly).
In GC-Prevue Version 11, for all practical purposes a physical layer can be considered any layer that is a recognized data type for use in PCB manufacturing or assembly. All CAM files can be defined as physical layers, especially so that one can control their display properties in a stacked view. Larger object types (eg. soldermask and power plane pads) are placed inward in the board from smaller ones. The board view can be flipped, as though looking at a real board. But the layer order for stacked views would be slightly different from the actual physical construction of the board. The Top solder mask layer would go inward from the top trace layer, so that the solder mask expansion of a pad can be seen (with both layers in view) as an annular ring around the component pad.
piezoelectric crystal — A piece of natural quartz or other crystalline material capable of demonstrating the piezoelectric effect. A quartz crystal, when ground to certain dimensions, will vibrate at an appropriate radio frequency when placed in an electric circuit.
[Graf, Rudolf F. Modern Dictionary of Electronics. Newnes, 1999]
pin out — Pin-number assignment, the relation between the logical inputs and outputs of an electronic device and their physical counterparts in the PCB
package. Pin-outs will involve pin numbers (aka pin designators) as a link between schematic and PCB design (both being computer generated files). In more complicated packages, they may involve alphanumeric characters, such as A1, A2, ... U17 for a BGA with 289 balls.
Even for devices with only two pins and no polarity, such as resistors, the
netlist extracted from a schematic will have a pin 1 and pin 2 for each resistor, even though the schematic might not show a pin number label as such. (The visibility in the schematic of the pin numbers can be turned on or off at will, but the significance of the pin number assignment is still there in the schematic and subsequently, through the netlist extracted from it, the PCB database.) For CAD CAE electronics to work at all, the pin-outs for the PCB database must agree with the schematic.
P&IS — Packaging and Interconnecting Structure. The general term for a completely processed combination of base materials, supporting planes or constraining cores, and interconnection wiring that are used for the purpose of mounting and interconnecting components. [IPC D_7251]
PKI — Public Key Infrastructure. Email certification and encryption, including data attachments, is very useful to the international PCB design community. See Wikipedia: Public key infrastructure
plasma — A highly-ionized gas containing an approximately equal number of positive ions and negative electrons. Thus, as a whole it is electrically neutral, though conductive and affected by magnetic fields.
plated-through hole — A hole in a PWB with metal plating added after it is drilled. Its purpose it to serve either as a contact point for a through-hole component or as a via. In PCB vernacular and documentation, the spelling of the word through is sometimes shortened to thru. PTH is the acronym for plated thru hole. Getting plating in a hole through PCB dielectric (fiber-glass and epoxy or other non-conductive material) was a technological breakthrough for the PCB manufacturing industry. Obviously, you can't start with electroplating because a non-conductor can't be used as a
cathode in electrolytic plating.
A special process had to be used to get metal to adhere to non-conductive material. This problem was solved long ago, but the orginial solution carried with it environmental hazards.
There are several methods covered by this article on
green technology for PTH by Retallick and Ding. Contrast with NPTH (Non-Plated Through Hole).
Plastic Leaded Chip Carrier — An SMT chip package that is rectangular or square- shaped with leads on all four sides. The leads are spaced at 0.050 inches, so this package is not considered fine-pitch.
PLM — In industry, product lifecycle management (PLM) is the process of managing the entire lifecycle of a product from inception, through engineering design and manufacture, to service and disposal of manufactured products.
PLM integrates people, data, processes and business systems and provides a product information backbone for companies and their extended enterprise . All About PLM
Product lifecycle management can be considered one of the four cornerstones of a manufacturing corporation's information technology structure. All companies need to manage communications and information with their customers (CRM-customer relationship management), their suppliers and fulfillment (SCM-supply chain), their resources within the enterprise (ERP-enterprise resource planning) and their product planning and development (PLM).
What is PLM?
PMIC — Power Management Integrated Circuit. The term PMIC refers to a class of integrated circuits that perform various functions related to power requirements. A PMIC may have one or more of the following functions:[1]
DC to DC conversion
Battery charging
Power-source selection
Voltage scaling
Power sequencing
Miscellaneous functions
Power management ICs are solid state devices that control the flow and direction of electrical power. Many electrical devices have multiple internal voltages (e.g., 5 V, 3.3 V, 1.8 V, etc.) and sources of external power (e.g., wall outlet, battery, etc.), meaning that the power design of the device has multiple requirements for operation. A PMIC can refer to any chip that is an individual power related function, but generally refer to ICs that incorporate more than one function such as different power conversions and power controls such as voltage supervision and undervoltage protection.
The peak pulse power rating (PPP) of a TVS diode is defined as the instantaneous
power dissipated for a given pulse duration. The rating is calculated by the following:
Ppp(given in Watts) = Vc x Ipp
Vc = Clamping Voltage
Ipp = Peak Pulse Current
(See also Ipp and clamping voltage )
PDF download:
TVS Peak Pulse Power, Pulse Duration & Temperature by Ivan G. Lawson
polyimides — [PCB Fabrication] A specialized resin used in PCB dielectrics. Polyimides are a class of thermally stable resins that have good strength at high temperatures and high resistance to oxidative degradation. Polyimide resins are soluble thermoplastic polyimides for high temperature adhesives and composites.
Citations and more information is available at:
Nanotech Elektronik. "Materials for Printed Circuit Boards." PCB Materials, Nanotech Elektronik, 2022, www.nanotech-elektronik.pl/index.php/en/info/materials.
Holm, Aleksander, et al. "
Polyimide Resins." Golden, Golden Recursion Inc., Mar. 2021, golden.com/wiki/Polyimide_resins-JNBABN5.
populate — Install (place, attach and solder) components onto (a
printed wiring board ). (Slang) Also known as " stuff." This can refer to a single component, as in the acronym used in schematics "DNP", which means "Do Not Populate".
position — A type of index for an aperture in an aperture list which is a number from 1 to the number of apertures in the aperture list. Position 1 is linked to
D code D10, 2 is D11 and so on. Positions appear only in aperture lists, and never in a Gerber file. Cadstar aperture lists use the column heading Position to mean D code. Abbreviated "Pos" in GC-Prevue.
positive — noun A developed image of photoplotted film, where the areas selectively exposed by the photo plotter appear black, and unexposed areas are clear. Board houses work from positives, and a photo plotter produces positives, thus one set of positives is all the film that is needed to produce a
printed wiring board. modifier (of a printed wiring image) Representing copper as black areas and absence of copper as clear areas. Typical of images of routed layers of a PWB.
power integrity — Power integrity or PI is an analysis to check whether the desired voltage and current are met from source to destination. Today, power integrity plays a major role in the success and failure of new electronic products. There are several coupled aspects of PI: on the chip, in the chip package, on the circuit board, and in the system. Four main issues must be resolved to ensure power integrity at the printed circuit board level:
Keep the voltage ripple at the chips pads lower than the specification (e.g. less than +/-50 mV variation around 1V)
Control ground bounce (also called synchronous switching noise, simultaneous switching noise, or simultaneous switching output (SSN or SSO))
Control electromagnetic interference and maintain electromagnetic compatibility: the power distribution network is generally the largest set of conductors on the circuit board and therefore the largest (unwanted) antenna for emission and reception of noise.
Maintaining a proper DC Voltage level at the load at high currents. A modern processor or field-programmable gate array can pull 1-100 Amps at sub-1V VDD levels with AC and DC margins in the tens of millivolts. Very little DC voltage drop can thus be tolerated on the power distribution network.
[ "Simulating FPGA Power Integrity Using S-Parameter Models" (PDF). Xilinx. Retrieved 2018-03-18.]
[ "Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics" (PDF). Xilinx. Retrieved 2018-03-18.]
[ Bogatin, Eric (13 July 2009). Signal and Power Integrity - Simplified. Pearson Education. ISBN 978-0-13-703503-8.]:615
prepreg — Fiberglass cloth pre-impregnated with uncured resin. The particular type of resin is usually either epoxy or polyurethane. Prepreg is dialectric only, so use of it requires an accompanying layer of copper foil.Printed board layer stackups of 4 or more layers typically employ prepreg along with core and copper foil (q.v.).
primitive — ()[CAD software programs and documentation]
Some CAD software documentation (especially Altium Designer) extends this term to mean any object in a CAD database--graphics, text or otherwise; so this could be a group of graphic objects if manipulated as a unit, eg. a
PCB decal. It may also mean an indivisible graphic object, i.e. a graphical object which may have component parts, but which can not have those parts separated out as individual entities. It can also refere to a parameter or text string. Examples of this in PCB CAD: wire segment, route, pad or padstack, text string.
Altium Designer also uses the term primitive to mean the smallest element of an object. It can have parameters, such as width and color, etc.
Examples of Primitives in Altium:
String - A string of text characters is a primitive. The individual characters are not considered by Alitum to be primitives. It can have parameters like text height and stroke width, rotation, whether mirrored or not etc.
Note that these meanings are ideas I have gleaned from using Altium Designer. I have never been able to find any document at Altium.com that gives their definition for this term.
Any geometric shape such as a circle, polygon or square.
A flat plate or base of insulating material containing a pattern of conducting material and components placed and soldered to it. It is an electrical circuit. It is a "
printed wiring board " (PWB) that has been " stuffed."
The conducting material is commonly copper which has been coated with solder or plated with tin or tin-lead alloy. The usual insulating material is epoxy laminate. But there are many other kinds of materials used in more exotic technologies.
Single-sided boards, the most common style in mass-produced consumer electronic products, have all conductors on one side of the board. With two-sided boards, the conductors, or copper traces, can travel from one side of the board to the other through plated-thru holes called
vias , or feed-throughs. In multilayer boards, the vias can connect to internal layers as well as either side.
PSA — [Adhesives] Pressure Sensitive Adhesive. A tape utilizing PSA would be a continuous flexible strip of cloth, paper, metal or plastic coated on one or both sides with a permanently tacky adhesive at room termperature which will adhere to a variety of surfaces with light pressure (finger pressure) with no phase change (liquid to solid) and usually on a roll. Example: Scotch Magic Tape. A Guide To Adhesive Tapes – All You Need To Know About Adhesive Tapes (Koch.com blog)
PSAs can be blends of natural or synthetic rubber and resin, acrylic, silicone or other polymer systems, with or without additives.
PSA TAPE DEFINED by Pressure Sensitive Tape Council
Photo Solder Resist, which is the same as LPI solder resist / solder mask. Note that "solder resist" and "solder mask," while synomonous in some respects, do not always have identical meanings. Some prefer to use "solder resist" for the material used in board construction during fabrication and use the "solder mask" for the coating on the outer layers of a finished board, applied just before appling the epoxy ink legend (aka silk screen).
Plugging by Solder Resist or Plugging by Solder Mask. A small button of solder resist is added to the top pads of vias to cover the vias (and also plug the upper end of the via barrel) or similarly on the bottom side via pads. This is often used selectively, especially for via pads that are underneath a BGA. In this case, specific vias are tented on the BGA side by a secondary solder mask application. Copper plating is applied to via barrel prior to solder mask and PSR. Artwork is supplied for this and is positive-image. It is recommended that a PSR by applied to vias under a BGA, because these insulate the via from the ball. Merely covering vias with the LPI application is low reliability. The first solder mask application should partially cover the via pad and leave the via hole open, with an annular margin of pull-back around the finished via hole of about 4 mils in the artwork. In PCB design CAD, this is typically specified with a negative solder mask expansion to achieve this effect. The PSR artwork should be about 2 mils larger than the via pad, more if there is room under the BGA. Also known as via button print.
Example for 0.8mm(31.50mil)-pitch BGA (Units in mils. To convert to microns, multiply mils by 25.4 micron/mil. To convert to mm, multiply mils by 0.0254 mm/mil):
Vias 20-mil pad with 7-mil finished hole
Via Pad Solder Mask expansion = -2.5 mil
Drilled with a 10-mil bit
Ball Lands 14-mil diameter with solder Mask expansion = 2.5 mil
Via button print = 22 mil diameter
BGA Mask Dam (measured) = 5.16 mil
In the above example, solder mask expansion is an annular ring expansion or radius expansion. Because of the negative expansion of via pad solder mask, the opening in the solder mask over the via hole on first application is 20-(2.5x2)=15 mil. The via hole is 7 mils finished, so this give a theoretical pull back of 4 mils. This helps allow for drill-bit wander and other manufacturing tolerances.
PSTC — The Pressure Sensitive Tape Council. PSTC is a not-for-profit, 60-year old, North American trade association for tape manufacturers and affiliate suppliers, dedicated to helping the industry produce quality pressure sensitive adhesive tape products in the global marketplace.
pullback pad — Refers to the pads on an LLP being pulled back under the body, with no metal exposed at the edge of the package. (Contrasted with No pullback pad) The type, pullback or no pullback, effects the solder stencil requirements.
Detailed and specific information concerning PCB layout, fabrication, and mounting an LD (LLP) package, including solder stencil consideratons regarding pullback versus no pullback pads, is available in the Texas Instruments (nee National)
application note AN-1187.
pull down — - A resistor is connected to a signal wire with its opposite pin connected to ground. This pulls (forces) the logical state down to logical zero voltage within the threshold for the zero-state for that circuit.
pulse waveform — A pulse or square wave is the waveform of digital signals, which are composed of a series of bits representing states that are either ON or OFF (HIGH or LOW in terms of voltage). A square wave is a theoretical ideal. A pulse consists of a period and a pulse width. In real applications, it varies from the ideal square wave by having a rising edge, a falling edge, overshoot, ringing and droop. These properties are well-explained with a good illustration by Dr. Shahrel A. Suandi of Universiti Sains Malaysia (USM) in a downloadable PDF at EEE130 Digital Electronics I Lecture #1_1 - Digital Waveforms
Printed Board. According to IPC, PWB is an older term that they prefer no longer be used. But to be honest, they still use it in their publications.
Some electrical engineers use PWB to distinguish from PCB . PWB stands for Printed Wiring Board; a "bare board"; an
unstuffed PCB. It is flat plate or base of insulating material containing a pattern of conducting material. It is not an electrical circuit until components are placed and soldered to it.
The acronynm PWB, followed by a part number, can be included in
clad, sometimes in both clad and
silkscreen, on a printed circuit board. Some companies use the acronym PCB for this instead of PWB.
